Jason Cong

Active 1988–2026

624
Papers
28,187
Citations
82
h-index
416
i10-index

Citations

Citations per year for Jason Cong1988: 1 citations1990: 13 citations1991: 19 citations1992: 38 citations1993: 82 citations1994: 92 citations1995: 127 citations1996: 180 citations1997: 167 citations1998: 190 citations1999: 150 citations2000: 228 citations2001: 321 citations2002: 279 citations2003: 362 citations2004: 418 citations2005: 524 citations2006: 568 citations2007: 567 citations2008: 511 citations2009: 506 citations2010: 419 citations2011: 462 citations2012: 535 citations2013: 596 citations2014: 641 citations2015: 748 citations2016: 805 citations2017: 916 citations2018: 1,142 citations2019: 1,171 citations2020: 1,303 citations2021: 1,354 citations2022: 1,138 citations2023: 1,094 citations2024: 1,005 citations2025: 1,009 citations2026: 321 citations1989: no citations, so this year is not shown

Citation sources

Countries

World map of the countries and regions citing this authorUnited States: 5,262 citing papers, 34.2% of this breakdownChina: 2,402 citing papers, 15.6% of this breakdownCanada: 639 citing papers, 4.2% of this breakdownUnited Kingdom: 576 citing papers, 3.8% of this breakdownGermany: 529 citing papers, 3.4% of this breakdownTaiwan: 527 citing papers, 3.4% of this breakdownJapan: 494 citing papers, 3.2% of this breakdownIndia: 452 citing papers, 2.9% of this breakdownSouth Korea: 431 citing papers, 2.8% of this breakdownSwitzerland: 401 citing papers, 2.6% of this breakdownHong Kong: 342 citing papers, 2.2% of this breakdownFrance: 325 citing papers, 2.1% of this breakdown
0%34.2%Other 19.6%

Fields

  • Computer Science57%
  • Engineering36.5%
  • Medicine2.5%
  • Biochemistry, Genetics and Molecular Biology1.7%
  • Physics and Astronomy0.7%
  • Neuroscience0.4%
  • Other1.2%

Topics

  • VLSI and FPGA Design Techniques9.1%
  • Parallel Computing and Optimization Techniques9%
  • Embedded Systems Design Techniques8.1%
  • Interconnection Networks and Systems6.9%
  • Low-power high-performance VLSI design6.5%
  • VLSI and Analog Circuit Testing5.7%
  • Other54.7%

Coauthors

All papers

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  1. Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks

    Authors: , , , , , - ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2015 cited by 2,128

  2. FPGA HLS Today: Successes, Challenges, and Opportunities

    Authors: , , , , , , - ACM Transactions on Reconfigurable Technology and Systems, ACM Trans. Reconfigurable Technol. Syst. 2022 cited by 170

  3. SACNN: Self-Attention Convolutional Neural Network for Low-Dose CT Denoising With Self-Supervised Perceptual Loss Network

    Authors: , , , , - IEEE Transactions on Medical Imaging, IEEE Trans. Medical Imaging 2020 cited by 319

  4. High-Level Synthesis for FPGAs: From Prototyping to Deployment

    Authors: , , , , , - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2011 cited by 835

  5. Scaling for edge inference of deep neural networks

    Authors: , , , , , , - Nature Electronics 2018 cited by 469

  6. AutoSA: A Polyhedral Compiler for High-Performance Systolic Arrays on FPGA

    Authors: , , - The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2021 cited by 125

  7. Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs

    Authors: , , , , , , , - Design Automation Conference 2017, DAC 2017 cited by 416

  8. AutoDSE: Enabling Software Programmers to Design Efficient FPGA Accelerators

    Authors: , , , - ACM Transactions on Design Automation of Electronic Systems, ACM Trans. Design Autom. Electr. Syst. 2021 cited by 85

  9. Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication

    Authors: , , , , , - ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2022 cited by 81

  10. HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing

    Authors: , , , , , , , - ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2019 cited by 128

  11. AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs

    Authors: , , , , , , , - The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2021 cited by 86

  12. FlexCNN: An End-to-end Framework for Composing CNN Accelerators on FPGA

    Authors: , , , , - ACM Transactions on Reconfigurable Technology and Systems, ACM Trans. Reconfigurable Technol. Syst. 2022 cited by 60

  13. Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks

    Authors: , , , , , - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2018 cited by 268

  14. Optimality Study of Existing Quantum Computing Layout Synthesis Tools

    Authors: , - IEEE Transactions on Computers, IEEE Trans. Computers 2020 cited by 91

  15. An efficient design and implementation of LSM-tree based key-value store on open-channel SSD

    Authors: , , , , , , - Ninth European Conference on Computer Systems, EuroSys 2014 cited by 188

  16. PolySA: polyhedral-based systolic array auto-compilation

    Authors: , - Conference on Computer-Aided Design, ICCAD 2018 cited by 105

  17. SODA: stencil with optimized dataflow architecture

    Authors: , , , - Conference on Computer-Aided Design, ICCAD 2018 cited by 98

  18. FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates

    Authors: , , , , , , , , - IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) 2017 cited by 309

  19. Scalable Optimal Layout Synthesis for NISQ Quantum Processors

    Authors: , , , , - 60th ACM/IEEE Design Automation Conference (DAC) 2023 cited by 36

  20. Hydro-Seq enables contamination-free high-throughput single-cell RNA-sequencing for circulating tumor cells

    Authors: , , , , , , , , , , , , , , - Nature Communications 2019 cited by 227

  21. A Survey on Graph Neural Network Acceleration: Algorithms, Systems, and Customized Hardware

    Authors: , , , , , , , , , - ACM Computing Surveys, ACM Comput. Surv. 2026 cited by 31

  22. Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU

    Authors: , , , , - IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM) 2019 cited by 87

  23. Qubit Mapping for Reconfigurable Atom Arrays

    Authors: , , , - IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022 cited by 27

  24. FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs

    Authors: , - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994 cited by 678