Supporting Very Large DRAM Caches with Compound-Access Scheduling and MissMap

Authors: Gabriel H. Loh, Mark D. Hill - IEEE/ACM International Symposium on Microarchitecture 2012 cited by 67

This work efficiently enables conventional block sizes for very large die-stacked DRAM caches with two innovations: it makes hits faster with compound-access scheduling and misses faster with a MissMap. The combination of these mechanisms enables the new organization to deliver performance comparable to that of an idealistic DRAM cache that employs an impractically large SRAM-based on-chip tag array.