An embedded processor core for consumer appliances with 5.6 GFLOPS and 73M polygons/s FPU

著者: Fumio Arakawa, Takashi Okada, Tomoichi Hayashi, Osamu Nishii, Toshihiro Hattori, M. Nishibori, T. Hiraoka, M. Ozawa, T. Kodama, T. Irita, T. Kamei, Makoto Ishikawa, Y. Nitta, O. Nishii, T. Hattori - Microprocessors and Microsystems 2004 被引用: 3