Robert K. Brayton
Active 1963–2024
- 347
- Papers
- 22,574
- Citations
- 70
- h-index
- 251
- i10-index
Citations
Citation sources
Countries
Institutions
Fields
- Computer Science69.8%
- Engineering24%
- Neuroscience1.6%
- Biochemistry, Genetics and Molecular Biology1.5%
- Mathematics0.8%
- Physics and Astronomy0.6%
- Other1.7%
Topics
- Formal Methods in Verification14%
- VLSI and Analog Circuit Testing10.5%
- Low-power high-performance VLSI design7.8%
- VLSI and FPGA Design Techniques6.4%
- Embedded Systems Design Techniques6.1%
- Software Testing and Debugging Techniques3.8%
- Other51.4%
Coauthors
- Alberto L. Sangiovanni-Vincentelli92
- Alan Mishchenko67
- Tiziano Villa32
- Patrick C. McGeer17
- Vigyan Singhal17
- Alberto Sangiovanni‐Vincentelli16
- Adnan Aziz14
- Alexander Saldanha14
- Rajeev Murgai13
- Ramin Hojati13
- Fan Mo12
- Giovanni De Micheli12
- Satrajit Chatterjee12
- Sunil P. Khatri11
- Gary D. Hachtel10
- Hamid Savoj10
- Timothy Kam10
- Evguenii I. Goldberg9
- Narendra V. Shenoy9
- Thomas R. Shiple9
- William K. C. Lam9
- Jie-Hong Roland Jiang8
- Nina Yevtushenko8
- Sharad Malik8
All papers
- ABC: An Academic Industrial-Strength Verification Tool
Authors: Robert K. Brayton, Alan Mishchenko - Lecture notes in computer science, CAV 2010 cited by 923
- DAG-aware AIG rewriting a fresh look at combinational logic synthesis
Authors: Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton - Proceedings - ACM IEEE Design Automation Conference, DAC 2006 cited by 484
- Logic Minimization Algorithms for VLSI Synthesis
Authors: Robert K. Brayton, Gary D. Hachtel, Curtis T. McMullen, Alberto L. Sangiovanni-Vincentelli - Kluwer international series in engineering and computer science 1984 cited by 1,974
- A Simulation-Guided Paradigm for Logic Synthesis and Verification
Authors: Siang-Yun Lee, Heinz Riener, Alan Mishchenko, Robert K. Brayton, Giovanni De Micheli - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2021 cited by 36
- Reducing Structural Bias in Technology Mapping
Authors: Satrajit Chatterjee, Alan Mishchenko, Robert K. Brayton, Xinning Wang, Timothy Kam - ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design 2005 cited by 82
- Scalable don't-care-based logic optimization and resynthesis
Authors: Alan Mishchenko, Robert K. Brayton, Jie-Hong Roland Jiang, Stephen Jang - ACM Transactions on Reconfigurable Technology and Systems, ACM Trans. Reconfigurable Technol. Syst. 2009 cited by 91
- Verifying Continuous Time Markov Chains
Authors: Adnan Aziz, Kumud Sanwal, Vigyan Singhal, Robert K. Brayton - Lecture notes in computer science, CAV 1996 cited by 340
- Improvements to Technology Mapping for LUT-Based FPGAs
Authors: Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, FPGA 2006 cited by 156
- Efficient implementation of property directed reachability
Authors: Niklas Eén, Alan Mishchenko, Robert K. Brayton - http://www.eecs.berkeley.edu/%7Ealanmi/publications/2011/fmcad11_pdr.pdf 2011 cited by 276
- A theory of nonlinear networks. I
Authors: Robert K. Brayton, Jürgen Moser - Quarterly of Applied Mathematics 1964 cited by 455
- Improvements to combinational equivalence checking
Authors: Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton, Niklas Eén - Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2006 cited by 130
- Scalable Logic Synthesis using a Simple Circuit Structure
Authors: Alan Mishchenko, Robert K. Brayton - Ground Water 2006 cited by 87
- MIS: A Multiple-Level Logic Optimization System
Authors: Robert K. Brayton, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli, Albert R. Wang - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987 cited by 1,163
- Model-checking continous-time Markov chains
Authors: Adnan Aziz, Kumud Sanwal, Vigyan Singhal, Robert K. Brayton - ACM Transactions on Computational Logic, ACM Trans. Comput. Log. 2000 cited by 415
- Multilevel logic synthesis
Authors: Robert K. Brayton, Gary D. Hachtel, Alberto L. Sangiovanni-Vincentelli - IEEE, Proc. IEEE 1990 cited by 412
- SAT-Based Complete Don't-Care Computation for Network Optimization
Authors: Alan Mishchenko, Robert K. Brayton - Design, Automation, and Test in Europe, DATE 2005 cited by 98
- Deep Integration of Circuit Simulator and SAT Solver
Authors: He-Teng Zhang, Jie-Hong R. Jiang, Luca G. Amarù, Alan Mishchenko, Robert K. Brayton - 58th ACM/IEEE Design Automation Conference (DAC) 2021 cited by 17
- Enabling exact delay synthesis
Authors: Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Pierre-Emmanuel Gaillardon, Janet Olson, Robert K. Brayton, Giovanni De Micheli - IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2017 cited by 17
- Enhancing Delay-Driven LUT Mapping With Boolean Decomposition
Authors: Alessandro Tempia Calvino, Giovanni De Micheli, Alan Mishchenko, Robert K. Brayton - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2024 cited by 6
- Sequential Circuit Design Using Synthesis and Optimization
Authors: Ellen Sentovich, Kanwar Jit Singh, Cho W. Moon, Hamid Savoj, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli - Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors, ICCD 1992 cited by 615
- Logic verification using binary decision diagrams in a logic synthesis environment
Authors: Sharad Malik, Albert R. Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli - [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers 1988 cited by 509
- Multi-level logic minimization using implicit don't cares
Authors: Karen A. Bartlett, Robert K. Brayton, Gary D. Hachtel, Reily M. Jacoby, Christopher R. Morrison, Richard L. Rudell, Alberto L. Sangiovanni-Vincentelli, Albert R. Wang - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988 cited by 264
- Global delay optimization using structural choices
Authors: Alan Mishchenko, Robert K. Brayton, Stephen Jang - ACM/SIGDA international symposium on Field programmable gate arrays, FPGA 2010 cited by 31
- Improvements to boolean resynthesis
Authors: Luca Gaetano Amarù, Mathias Soeken, Patrick Vuillod, Jiong Luo, Alan Mishchenko, Janet Olson, Robert K. Brayton, Giovanni De Micheli - Design, Automation & Test in Europe Conference & Exhibition (DATE) 2018 cited by 20
